Capacitors are common devices formed in semiconductor processing in the fabrication of integrated circuitry. Such comprise a pair of conductive plates or elements separated by an intervening capacitor dielectric layer. The plates on opposite sides of the dielectric are oppositely charged by a suitable voltage source, with the electrical energy of the charge system being stored in the polarized dielectric with capacitance being proportional to the area and dielectric constant of the dielectric layer and inversely proportional to its thickness.
One common material utilized for capacitor plates is conductively doped polysilicon. Such is utilized because of its compatibility with subsequent high temperature processing steps, good thermal expansion properties with SiO.sub.2, and its ability to be conformally deposited over widely varying topography. A common dielectric layer utilized in fabrication of polysilicon capacitors is silicon nitride. An alternate material which can be used in combination with silicon nitride is silicon dioxide.
When fabricating a capacitor, a junction interface will typically be provided between the lower conductive capacitor plate and an electrically insulating layer, such as silicon dioxide, upon which the lower capacitor plate is partially formed. This lower polysilicon layer is typically patterned, and then covered by a blanket deposition of silicon nitride which serves as the capacitor dielectric layer. However, silicon nitride deposits at different rates atop polysilicon and silicon dioxide.
For example, FIG. 1 illustrates a prior art wafer construction indicated generally by reference numeral 10. Such is comprised of a silicon dioxide layer 12 having a trench opening 14 provided therein. A conductively doped layer 16 of polysilicon overlies silicon dioxide layer 12, and has been patterned to define a desired outline of a lower capacitor plate shape. A layer 18 of silicon nitride has been deposited atop capacitor plate 16 and silicon dioxide layer 12. As shown, nucleation of silicon nitride layer 18 occurs much quicker with respect to the polysilicon of layer 16 than with oxide layer 12, thus resulting in a thicker portion of layer 18 over polysilicon 16 than over silicon dioxide 12. Undesirably, this creates a very thin region, typically even thinner than that portion of nitride layer 18 over silicon dioxide 12, at location 20 where the polysilicon 16 and silicon dioxide layer 12 join. This thinner portion is highly undesirable, as a weak point is created where voltage breakdown or shorting between the capacitor plates can undesirably occur.
It would be desirable to develop processes and structures which alleviate this problem. The invention was primarily motivated out of concerns associated with capacitor formation impacted by a polysilicon and silicon dioxide interface at the edge of a lower capacitor plate. However, the artisan will appreciate utility of the invention to other aspects of semiconductor wafer processing, with the invention only being limited by the accompanying claims appropriately interpreted in accordance with the doctrine of equivalents.